MAIX is Sipeed’s purpose-built module designed to run AI at the edge, A small AI mmodule
Sipeed MAix-I module w/o WiFi (MERGE) - eucaiot Store
Sipeed MAix-I module w/o WiFi (MERGE) - eucaiot Store
Sipeed MAix-I module w/o WiFi (MERGE) - eucaiot Store

Seeed Studio

Sipeed MAix-I module w/o WiFi (MERGE)

Sale priceR 177.05
SKU: 114991695

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Sipeed MAix: AI at the edge

AI is pervasive today, from consumer to enterprise applications. With the explosive growth of connected devices, combined with a demand for privacy/confidentiality, low latency, and bandwidth constraints, AI models trained in the cloud increasingly need to be run at the edge.

MAIX is Sipeed’s purpose-built module designed to run AI at the edge, we called it AIoT. It delivers high performance in a small physical and power footprint, enabling the deployment of high-accuracy AI at the edge, and the competitive price makes it possible to embed on any IoT device. As you see, Sipeed MAIX is quite like Google edge TPU, but it acts as a master controller, not an accelerator like edge TPU, so it is more low cost and low power than the AP+edge TPU solution.

MAix's Advantage and Usage Scenarios:

  • MAIX is not only hardware but also provides an end-to-end, hardware + software infrastructure for facilitating the deployment of customers' AI-based solutions.
  • Thanks to its performance, small footprint, low power, and low cost, MAIX enables the broad deployment of high-quality AI at the edge.
  • MAIX isn't just a hardware solution, it combines custom hardware, open software, and state-of-the-art AI algorithms to provide high-quality, easy-to-deploy AI solutions for the edge.
  • MAIX can be used for a growing number of industrial use cases such as predictive maintenance, anomaly detection, machine vision, robotics, voice recognition, and many more. It can be used in manufacturing, on-premise, healthcare, retail, smart spaces, transportation, etc.

MAix's CPU

  • In hardware, MAIX has a powerful KPU K210 inside, it offers many exciting features:
  • 1st competitive RISC-V chip, also 1st competitive AI chip, newly released in Sep. 2018
  • 28nm process, dual-core RISC-V 64bit IMAFDC, on-chip huge 8MB high-speed SRAM (not for XMR :D), 400MHz frequency (able to 800MHz)
  • KPU (Neural Network Processor) inside, 64 KPU which is 576bit width, supports convolution kernels, any form of the activation function. It offers 0.25TOPS@0.3W,400MHz, when overclocking to 800MHz, it offers 0.5TOPS. It means you can do object recognition 60fps@VGA
  • APU (Audio Processor) inside, support 8mics, up to 192KHz sample rate, hardcore FFT unit inside, easy to make a Mic Array (MAIX offers it too)
  • Flexible FPIOA (Field Programmable IO Array), you can map 255 functions to all 48 GPIOs on the chip
  • DVP camera and MCU LCD interface, you can connect a DVP camera, run your algorithm, and display it on the LCD
  • Many other accelerators and peripherals: AES Accelerator, SHA256 Accelerator, FFT Accelerator (not APU's one), OTP, UART, WDT, IIC, SPI, I2S, TIMER, RTC, PWM, etc.

MAix's Module

Inherit the advantage of K210's small footprint, Sipeed MAIX-I module, or called M1, integrate K210, 3-channel DC-DC power, 8MB/16MB/128MB Flash (M1w module add wifi chip esp8285 on it) into Square Inch Module. All usable IO breaks out as 1.27mm(50mil) pins, and the pin's voltage is selectable from 3.3V and 1.8V.

Sipeed Maix block pin

MAix's SoftWare

MAIX supports the original standalone SDK, and FreeRTOS SDK based on C/C++.
And we port micropython on it: http://en.maixpy.sipeed.com/. It supports FPIOA, GPIO, TIMER, PWM, Flash, OV2640, LCD, etc. And it has zmodem, vi, and SPIFFS on it, you can edit python directly or sz/rz file to board.

We are glad to see you contribute to it:
https://github.com/sipeed/MaixPy //Maixpy project
https://github.com/sipeed/MaixPy_Doc_Us_En_Backup //Maixpy wiki project

MAix's Deep learning

MAIX supports a fixed-point model that the mainstream training framework trains, according to specific restriction rules, and have a model compiler to compile models to its own model format. It supports tiny-Yolo, mobile net-v1, and, TensorFlow Lite! Many TensorFlow Lite models can be compiled and run on MAIX! And We will soon release a model shop, you can trade your model on it.

Specification

CPU: RISC-V Dual Core 64bit, 400Mh adjustable

Powerful dual-core 64-bit open architecture-based
processor with rich community resources

FPU Specifications

IEEE754-2008 compliant high-performance pipelined FPU

Debugging Support

High-speed UART and JTAG interface for debugging

Neural Network Processor (KPU)

• Supports the fixed-point model that the mainstream training framework trains according to specific restriction rules
• There is no direct limit on the number of network layers, and each layer of convolutional neural network parameters can be configured separately, including the number of input and output channels, and the input and output line width and column height
• Support for 1x1 and 3x3 convolution kernels
• Support for any form of activation function
• The maximum supported neural network parameter size for real-time work is 5MiB to 5.9MiB
• The maximum supported network parameter size when
working in non-real time is (flash size - software size)                   

Audio Processor (APU)

• Up to 8 channels of audio input data, ie 4 stereo channels
• Simultaneous scanning pre-processing and beamforming for sound sources in up to 16 directions
• Supports one active voice stream output
• 16-bit wide internal audio signal processing
• Support for 12-bit, 16-bit, 24-bit, and 32-bit input data widths • Multi-channel direct raw signal output
• Up to 192kHz sample rate
• Built-in FFT unit supports 512-point FFT of audio data
• Uses system DMAC to store output data in system memory          

Static Random-Access Memory (SRAM)

The SRAM is split into two parts, 6MiB of on-chip
general-purpose SRAM memory and 2MiB of on-chip AI SRAM memory, for a total of 8MiB

Field Programmable IO Array (FPIOA/IOMUX)

FPIOA allows users to map 255 internal functions to 48
free IOs on the chip

Digital Video Port (DVP)

Maximum frame size 640x480

FFT Accelerator

The FFT accelerator is a hardware implementation of the Fast Fourier Transform (FFT)


Electrical Specification

FreeRtos & Standard SDK

Support FreeRtos and Standard development kit.

MicroPython Support

Support MicroPython on M1

Machine vision

Machine vision based on a convolutional neural network

Machine hearing

A high-performance microphone array processor          


Hardware Features

Supply voltage of external power supply

5.0V ±0.2V

Supply current of external power supply

>300mA

Temperature rise

<30K

Range of working temperature

-30℃ ~ 85℃